(1) Field of the Invention
The present invention relates to a semiconductor non-volatile memory device and, more particularly, to a semiconductor non-volatile memory device in which stored digital information (or data) in terms of bits (binary digits) is electrically erasable.
(2) Description of the Related Art
As a typical semiconductor non-volatile memory device in which the stored data can be electrically erased, there is a Flotox (Floating-gate Tunnel Oxide) type memory cell. This Flotox type memory cell has a configuration as shown in FIG. 1.
On a semiconductor substrate 1, there are formed a memory transistor 17 equipped with a floating-gate 10 and a select transistor 19 with a drain diffusion layer 4 of the memory transistor 17 and a source diffusion layer 20 of the select transistor 19 being connected with each other at a node region 18.
Erasing of the data stored in the memory cell is carried out in the following way. A select gate 12 of the select transistor 19 is set to a high potential, for example, 20 V and a control gate 11 of the memory transistor 17 is set to a high potential, for example, 20 V, and further by grounding a source diffusion layer 3 of the memory transistor 17, a drain diffusion layer 21 of the select transistor 19 and the semiconductor substrate 1, the injection of electrons is performed from the drain diffusion layer 4 of the memory transistor 17 to the floating gate 10 through a tunnel insulating film 7 of a tunnel region 5 by Fowler-Nordheim tunneling action.
Next, the writing (storing) of the data in the memory cell is performed in the following ways. The drain diffusion layer 21 of the select transistor 19 is set to a high potential, for example, 20 V and the select gate 12 is applied with a voltage of, for example, 5 V, whereby the select transistor 19 turns to its ON-state. Next, the control gate 11 of the memory transistor 17 is grounded and, by placing the source diffusion layer 3 in its floating potential state, a high potential close to 20 V is thus applied to the drain diffusion layer 4 of the memory transistor 17, whereby the electrons are emitted from the floating gate 10 through the tunnel insulating film 7 of the tunnel region 5 by Fowler-Nordheim tunneling action.
In the conventional Flotox type memory device described above, since a high voltage is applied to the drain diffusion layer 21 of the select transistor 19 during the writing-in operation, it is necessary that the drain diffusion layer 21 be made sufficiently thick so as to be highly resistive to the high voltage applied thereto. For this reason, it is difficult to realize the short channeling of the select gate 12 of the select transistor and to make the memory cell smaller.